Diving into JTAG - Overview (Part 1)
As the first segment of a three-part series on JTAG, this post will give an overview of JTAG to set up some more in-depth discussions on debugging and JTAG Boundary-Scan. We will dive into the intricacies of the interface, such as the Test Access Port (TAP), key registers, instructions, and JTAG’s finite state machine. Like Interrupt? Subscribe to get our latest posts straight to your inbox.